EMBRACE: Emulating Biologically–Inspired Architectures on Hardware

This paper highlights and discusses the current challenges in the implementation of large scale Spiking Neural Networks (SNNs) in hardware. A mixed-mode approach to realising scalable SNNs on a reconfigurable hardware platform is presented. The approach uses compact low power analogue spiking neuron cells, with a weight storage capability, interconnected using Network on Chip (NoC) routers. Results presented show that this route to hardware implementation is promising. Key-words: Synapse, Network-on-Chip, Spiking Neural Networks, Reconfigurable, Neuron, Mixed-mode.